mmGCEA_ADDRDEC0_COL_SEL_LO_CS01_BASE_IDX 3871 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmGCEA_ADDRDEC0_COL_SEL_LO_CS01_BASE_IDX                                                       0
mmGCEA_ADDRDEC0_COL_SEL_LO_CS01_BASE_IDX 1837 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmGCEA_ADDRDEC0_COL_SEL_LO_CS01_BASE_IDX                                                       0
mmGCEA_ADDRDEC0_COL_SEL_LO_CS01_BASE_IDX 1781 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmGCEA_ADDRDEC0_COL_SEL_LO_CS01_BASE_IDX                                                       0