mmDSCL3_SCL_COEF_RAM_TAP_SELECT 4936 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDSCL3_SCL_COEF_RAM_TAP_SELECT                                                                0x0fb3
mmDSCL3_SCL_COEF_RAM_TAP_SELECT 6022 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCL3_SCL_COEF_RAM_TAP_SELECT                                                                0x112b
mmDSCL3_SCL_COEF_RAM_TAP_SELECT 5084 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCL3_SCL_COEF_RAM_TAP_SELECT                                                                0x112b