mmDSCL3_OBUF_CONTROL_BASE_IDX 5001 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDSCL3_OBUF_CONTROL_BASE_IDX                                                                  2
mmDSCL3_OBUF_CONTROL_BASE_IDX 6087 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCL3_OBUF_CONTROL_BASE_IDX                                                                  2
mmDSCL3_OBUF_CONTROL_BASE_IDX 5149 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCL3_OBUF_CONTROL_BASE_IDX                                                                  2