mmDSCL3_DSCL_MEM_PWR_CTRL 4996 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDSCL3_DSCL_MEM_PWR_CTRL                                                                      0x0fd1
mmDSCL3_DSCL_MEM_PWR_CTRL 6082 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCL3_DSCL_MEM_PWR_CTRL                                                                      0x1149
mmDSCL3_DSCL_MEM_PWR_CTRL 5144 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCL3_DSCL_MEM_PWR_CTRL                                                                      0x1149