mmDSCL2_SCL_TAP_CONTROL_BASE_IDX 4468 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDSCL2_SCL_TAP_CONTROL_BASE_IDX                                                               2
mmDSCL2_SCL_TAP_CONTROL_BASE_IDX 5455 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCL2_SCL_TAP_CONTROL_BASE_IDX                                                               2
mmDSCL2_SCL_TAP_CONTROL_BASE_IDX 4517 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCL2_SCL_TAP_CONTROL_BASE_IDX                                                               2