mmDSCL2_SCL_COEF_RAM_TAP_SELECT 4461 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDSCL2_SCL_COEF_RAM_TAP_SELECT                                                                0x0e98
mmDSCL2_SCL_COEF_RAM_TAP_SELECT 5448 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCL2_SCL_COEF_RAM_TAP_SELECT                                                                0x0fc0
mmDSCL2_SCL_COEF_RAM_TAP_SELECT 4510 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCL2_SCL_COEF_RAM_TAP_SELECT                                                                0x0fc0