mmDSCL2_SCL_COEF_RAM_TAP_DATA 4463 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDSCL2_SCL_COEF_RAM_TAP_DATA                                                                  0x0e99
mmDSCL2_SCL_COEF_RAM_TAP_DATA 5450 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCL2_SCL_COEF_RAM_TAP_DATA                                                                  0x0fc1
mmDSCL2_SCL_COEF_RAM_TAP_DATA 4512 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCL2_SCL_COEF_RAM_TAP_DATA                                                                  0x0fc1