mmDSCL2_DSCL_MEM_PWR_STATUS 4523 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDSCL2_DSCL_MEM_PWR_STATUS                                                                    0x0eb7
mmDSCL2_DSCL_MEM_PWR_STATUS 5510 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCL2_DSCL_MEM_PWR_STATUS                                                                    0x0fdf
mmDSCL2_DSCL_MEM_PWR_STATUS 4572 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCL2_DSCL_MEM_PWR_STATUS                                                                    0x0fdf