mmDSCL1_SCL_MANUAL_REPLICATE_CONTROL_BASE_IDX 3999 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDSCL1_SCL_MANUAL_REPLICATE_CONTROL_BASE_IDX                                                  2
mmDSCL1_SCL_MANUAL_REPLICATE_CONTROL_BASE_IDX 4887 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCL1_SCL_MANUAL_REPLICATE_CONTROL_BASE_IDX                                                  2
mmDSCL1_SCL_MANUAL_REPLICATE_CONTROL_BASE_IDX 3949 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCL1_SCL_MANUAL_REPLICATE_CONTROL_BASE_IDX                                                  2