mmDSCL1_SCL_COEF_RAM_TAP_SELECT 3986 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDSCL1_SCL_COEF_RAM_TAP_SELECT                                                                0x0d7d
mmDSCL1_SCL_COEF_RAM_TAP_SELECT 4874 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCL1_SCL_COEF_RAM_TAP_SELECT                                                                0x0e55
mmDSCL1_SCL_COEF_RAM_TAP_SELECT 3936 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCL1_SCL_COEF_RAM_TAP_SELECT                                                                0x0e55