mmDSCL1_SCL_COEF_RAM_TAP_DATA 3988 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDSCL1_SCL_COEF_RAM_TAP_DATA                                                                  0x0d7e
mmDSCL1_SCL_COEF_RAM_TAP_DATA 4876 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCL1_SCL_COEF_RAM_TAP_DATA                                                                  0x0e56
mmDSCL1_SCL_COEF_RAM_TAP_DATA 3938 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCL1_SCL_COEF_RAM_TAP_DATA                                                                  0x0e56