mmDSCL1_SCL_BLACK_OFFSET_BASE_IDX 4021 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDSCL1_SCL_BLACK_OFFSET_BASE_IDX                                                              2
mmDSCL1_SCL_BLACK_OFFSET_BASE_IDX 4909 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCL1_SCL_BLACK_OFFSET_BASE_IDX                                                              2
mmDSCL1_SCL_BLACK_OFFSET_BASE_IDX 3971 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCL1_SCL_BLACK_OFFSET_BASE_IDX                                                              2