mmDSCL1_DSCL_CONTROL 3994 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDSCL1_DSCL_CONTROL                                                                           0x0d81
mmDSCL1_DSCL_CONTROL 4882 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCL1_DSCL_CONTROL                                                                           0x0e59
mmDSCL1_DSCL_CONTROL 3944 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCL1_DSCL_CONTROL                                                                           0x0e59