mmDSCL0_SCL_COEF_RAM_TAP_DATA 3512 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDSCL0_SCL_COEF_RAM_TAP_DATA                                                                  0x0c63
mmDSCL0_SCL_COEF_RAM_TAP_DATA 4302 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCL0_SCL_COEF_RAM_TAP_DATA                                                                  0x0ceb
mmDSCL0_SCL_COEF_RAM_TAP_DATA 3364 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCL0_SCL_COEF_RAM_TAP_DATA                                                                  0x0ceb