mmDSCL0_DSCL_MEM_PWR_CTRL 3570 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDSCL0_DSCL_MEM_PWR_CTRL                                                                      0x0c80
mmDSCL0_DSCL_MEM_PWR_CTRL 4360 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCL0_DSCL_MEM_PWR_CTRL                                                                      0x0d08
mmDSCL0_DSCL_MEM_PWR_CTRL 3422 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCL0_DSCL_MEM_PWR_CTRL                                                                      0x0d08