mmDSCL0_DSCL_CONTROL_BASE_IDX 3519 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDSCL0_DSCL_CONTROL_BASE_IDX                                                                  2
mmDSCL0_DSCL_CONTROL_BASE_IDX 4309 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCL0_DSCL_CONTROL_BASE_IDX                                                                  2
mmDSCL0_DSCL_CONTROL_BASE_IDX 3371 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCL0_DSCL_CONTROL_BASE_IDX                                                                  2