mmDSCL0_DSCL_CONTROL 3518 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDSCL0_DSCL_CONTROL                                                                           0x0c66
mmDSCL0_DSCL_CONTROL 4308 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCL0_DSCL_CONTROL                                                                           0x0cee
mmDSCL0_DSCL_CONTROL 3370 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCL0_DSCL_CONTROL                                                                           0x0cee