mmDSCC5_DSCC_MEM_POWER_CONTROL 14346 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCC5_DSCC_MEM_POWER_CONTROL                                                                 0x31f1
mmDSCC5_DSCC_MEM_POWER_CONTROL 12205 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCC5_DSCC_MEM_POWER_CONTROL                                                                 0x31f1