mmDSCC5_DSCC_INTERRUPT_CONTROL_STATUS 14298 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCC5_DSCC_INTERRUPT_CONTROL_STATUS                                                          0x31d9
mmDSCC5_DSCC_INTERRUPT_CONTROL_STATUS 12157 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCC5_DSCC_INTERRUPT_CONTROL_STATUS                                                          0x31d9