mmDSCC2_DSCC_INTERRUPT_CONTROL_STATUS 13902 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCC2_DSCC_INTERRUPT_CONTROL_STATUS                                                          0x30c5
mmDSCC2_DSCC_INTERRUPT_CONTROL_STATUS 11763 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCC2_DSCC_INTERRUPT_CONTROL_STATUS                                                          0x30c5