mmDSCC0_DSCC_INTERRUPT_CONTROL_STATUS 13638 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDSCC0_DSCC_INTERRUPT_CONTROL_STATUS                                                          0x300d
mmDSCC0_DSCC_INTERRUPT_CONTROL_STATUS 11499 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDSCC0_DSCC_INTERRUPT_CONTROL_STATUS                                                          0x300d