mmDP_DTO5_PHASE  1212 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDP_DTO5_PHASE                                                         0x155
mmDP_DTO5_PHASE  1024 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDP_DTO5_PHASE                                                         0x155
mmDP_DTO5_PHASE  1103 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDP_DTO5_PHASE                                                         0x155
mmDP_DTO5_PHASE   814 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP_DTO5_PHASE                                                                                0x0095
mmDP_DTO5_PHASE  3549 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDP_DTO5_PHASE 0x0155
mmDP_DTO5_PHASE  1054 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDP_DTO5_PHASE                                                         0x155
mmDP_DTO5_PHASE   614 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP_DTO5_PHASE                                                                                0x0095
mmDP_DTO5_PHASE   252 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP_DTO5_PHASE                                                                                0x0095