mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX 9843 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX                                                              2
mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX 7956 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX                                                              2
mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX 10555 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX                                                              2
mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX 9503 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX                                                              2