mmDP_AUX1_AUX_INTERRUPT_CONTROL_BASE_IDX 9847 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP_AUX1_AUX_INTERRUPT_CONTROL_BASE_IDX                                                       2
mmDP_AUX1_AUX_INTERRUPT_CONTROL_BASE_IDX 7960 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP_AUX1_AUX_INTERRUPT_CONTROL_BASE_IDX                                                       2
mmDP_AUX1_AUX_INTERRUPT_CONTROL_BASE_IDX 10559 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP_AUX1_AUX_INTERRUPT_CONTROL_BASE_IDX                                                       2
mmDP_AUX1_AUX_INTERRUPT_CONTROL_BASE_IDX 9507 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP_AUX1_AUX_INTERRUPT_CONTROL_BASE_IDX                                                       2