mmDPP_TOP3_HOST_READ_CONTROL 4896 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDPP_TOP3_HOST_READ_CONTROL                                                                   0x0f93
mmDPP_TOP3_HOST_READ_CONTROL 5972 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDPP_TOP3_HOST_READ_CONTROL                                                                   0x110b
mmDPP_TOP3_HOST_READ_CONTROL 5034 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDPP_TOP3_HOST_READ_CONTROL                                                                   0x110b