mmDPP_TOP3_DPP_CONTROL 4886 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDPP_TOP3_DPP_CONTROL                                                                         0x0f8e
mmDPP_TOP3_DPP_CONTROL 5962 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDPP_TOP3_DPP_CONTROL                                                                         0x1106
mmDPP_TOP3_DPP_CONTROL 5024 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDPP_TOP3_DPP_CONTROL                                                                         0x1106