mmDPPCLK_CGTT_BLK_CTRL_REG  620 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDPPCLK_CGTT_BLK_CTRL_REG                                                                     0x0098
mmDPPCLK_CGTT_BLK_CTRL_REG  258 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDPPCLK_CGTT_BLK_CTRL_REG                                                                     0x0098
mmDPPCLK_CGTT_BLK_CTRL_REG  254 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDPPCLK_CGTT_BLK_CTRL_REG                                                                     0x0098