mmDP5_DP_SEC_CNTL1 4649 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDP5_DP_SEC_CNTL1                                                      0x4fc4
mmDP5_DP_SEC_CNTL1 4682 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDP5_DP_SEC_CNTL1                                                      0x4fc4
mmDP5_DP_SEC_CNTL1 5914 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDP5_DP_SEC_CNTL1                                                      0x4fc4
mmDP5_DP_SEC_CNTL1 11682 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP5_DP_SEC_CNTL1                                                                             0x1e42
mmDP5_DP_SEC_CNTL1 3411 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDP5_DP_SEC_CNTL1 0x4BAB
mmDP5_DP_SEC_CNTL1 4017 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDP5_DP_SEC_CNTL1                                                      0x4bab
mmDP5_DP_SEC_CNTL1 9959 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP5_DP_SEC_CNTL1                                                                             0x262c
mmDP5_DP_SEC_CNTL1 12642 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP5_DP_SEC_CNTL1                                                                             0x262c