mmDP5_DP_DPHY_PRBS_CNTL 4553 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDP5_DP_DPHY_PRBS_CNTL                                                 0x4fb5
mmDP5_DP_DPHY_PRBS_CNTL 4543 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDP5_DP_DPHY_PRBS_CNTL                                                 0x4fb5
mmDP5_DP_DPHY_PRBS_CNTL 5775 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDP5_DP_DPHY_PRBS_CNTL                                                 0x4fb5
mmDP5_DP_DPHY_PRBS_CNTL 11658 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP5_DP_DPHY_PRBS_CNTL                                                                        0x1e33
mmDP5_DP_DPHY_PRBS_CNTL 3385 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDP5_DP_DPHY_PRBS_CNTL 0x4BD4
mmDP5_DP_DPHY_PRBS_CNTL 3921 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDP5_DP_DPHY_PRBS_CNTL                                                 0x4bd4
mmDP5_DP_DPHY_PRBS_CNTL 9939 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP5_DP_DPHY_PRBS_CNTL                                                                        0x261d
mmDP5_DP_DPHY_PRBS_CNTL 12622 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP5_DP_DPHY_PRBS_CNTL                                                                        0x261d