mmDP5_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX 11721 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP5_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX                                                         2
mmDP5_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX 9998 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP5_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX                                                         2
mmDP5_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX 12681 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP5_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX                                                         2