mmDP4_DP_DPHY_HBR2_PATTERN_CONTROL 4641 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDP4_DP_DPHY_HBR2_PATTERN_CONTROL                                      0x4edd
mmDP4_DP_DPHY_HBR2_PATTERN_CONTROL 5873 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDP4_DP_DPHY_HBR2_PATTERN_CONTROL                                      0x4edd
mmDP4_DP_DPHY_HBR2_PATTERN_CONTROL 11438 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP4_DP_DPHY_HBR2_PATTERN_CONTROL                                                             0x1d5b
mmDP4_DP_DPHY_HBR2_PATTERN_CONTROL 9689 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP4_DP_DPHY_HBR2_PATTERN_CONTROL                                                             0x2545
mmDP4_DP_DPHY_HBR2_PATTERN_CONTROL 12354 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP4_DP_DPHY_HBR2_PATTERN_CONTROL                                                             0x2545
mmDP4_DP_DPHY_HBR2_PATTERN_CONTROL 11260 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP4_DP_DPHY_HBR2_PATTERN_CONTROL                                                             0x2545