mmDP3_DP_SEC_CNTL2_BASE_IDX 9402 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP3_DP_SEC_CNTL2_BASE_IDX                                                                    2
mmDP3_DP_SEC_CNTL2_BASE_IDX 12049 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP3_DP_SEC_CNTL2_BASE_IDX                                                                    2
mmDP3_DP_SEC_CNTL2_BASE_IDX 10955 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP3_DP_SEC_CNTL2_BASE_IDX                                                                    2