mmDP3_DP_MSA_TIMING_PARAM1_BASE_IDX 9388 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP3_DP_MSA_TIMING_PARAM1_BASE_IDX                                                            2
mmDP3_DP_MSA_TIMING_PARAM1_BASE_IDX 12035 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP3_DP_MSA_TIMING_PARAM1_BASE_IDX                                                            2
mmDP3_DP_MSA_TIMING_PARAM1_BASE_IDX 10941 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP3_DP_MSA_TIMING_PARAM1_BASE_IDX                                                            2