mmDP3_DP_DPHY_PRBS_CNTL 4551 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDP3_DP_DPHY_PRBS_CNTL                                                 0x4db5
mmDP3_DP_DPHY_PRBS_CNTL 4541 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDP3_DP_DPHY_PRBS_CNTL                                                 0x4db5
mmDP3_DP_DPHY_PRBS_CNTL 5773 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDP3_DP_DPHY_PRBS_CNTL                                                 0x4db5
mmDP3_DP_DPHY_PRBS_CNTL 11090 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP3_DP_DPHY_PRBS_CNTL                                                                        0x1c33
mmDP3_DP_DPHY_PRBS_CNTL 3281 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDP3_DP_DPHY_PRBS_CNTL 0x45D4
mmDP3_DP_DPHY_PRBS_CNTL 3919 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDP3_DP_DPHY_PRBS_CNTL                                                 0x45d4
mmDP3_DP_DPHY_PRBS_CNTL 9319 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP3_DP_DPHY_PRBS_CNTL                                                                        0x241d
mmDP3_DP_DPHY_PRBS_CNTL 11966 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP3_DP_DPHY_PRBS_CNTL                                                                        0x241d
mmDP3_DP_DPHY_PRBS_CNTL 10872 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP3_DP_DPHY_PRBS_CNTL                                                                        0x241d