mmDP1_DP_VID_MSA_VBID_BASE_IDX 10507 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP1_DP_VID_MSA_VBID_BASE_IDX                                                                 2
mmDP1_DP_VID_MSA_VBID_BASE_IDX 8684 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP1_DP_VID_MSA_VBID_BASE_IDX                                                                 2
mmDP1_DP_VID_MSA_VBID_BASE_IDX 11295 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP1_DP_VID_MSA_VBID_BASE_IDX                                                                 2
mmDP1_DP_VID_MSA_VBID_BASE_IDX 10201 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP1_DP_VID_MSA_VBID_BASE_IDX                                                                 2