mmDP1_DP_SEC_PACKET_CNTL 4725 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDP1_DP_SEC_PACKET_CNTL                                                0x4bce
mmDP1_DP_SEC_PACKET_CNTL 4778 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDP1_DP_SEC_PACKET_CNTL                                                0x4bce
mmDP1_DP_SEC_PACKET_CNTL 6010 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDP1_DP_SEC_PACKET_CNTL                                                0x4bce
mmDP1_DP_SEC_PACKET_CNTL 10566 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP1_DP_SEC_PACKET_CNTL                                                                       0x1a4c
mmDP1_DP_SEC_PACKET_CNTL 3208 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDP1_DP_SEC_PACKET_CNTL 0x1FAA
mmDP1_DP_SEC_PACKET_CNTL 4093 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDP1_DP_SEC_PACKET_CNTL                                                0x1faa
mmDP1_DP_SEC_PACKET_CNTL 8739 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP1_DP_SEC_PACKET_CNTL                                                                       0x2236
mmDP1_DP_SEC_PACKET_CNTL 11350 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP1_DP_SEC_PACKET_CNTL                                                                       0x2236
mmDP1_DP_SEC_PACKET_CNTL 10256 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP1_DP_SEC_PACKET_CNTL                                                                       0x2236