mmDP1_DP_SEC_CNTL5 8787 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP1_DP_SEC_CNTL5                                                                             0x2256
mmDP1_DP_SEC_CNTL5 11398 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP1_DP_SEC_CNTL5                                                                             0x2256
mmDP1_DP_SEC_CNTL5 10304 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP1_DP_SEC_CNTL5                                                                             0x2256