mmDP1_DP_SEC_CNTL 4637 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDP1_DP_SEC_CNTL                                                       0x4bc3
mmDP1_DP_SEC_CNTL 4668 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDP1_DP_SEC_CNTL                                                       0x4bc3
mmDP1_DP_SEC_CNTL 5900 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDP1_DP_SEC_CNTL                                                       0x4bc3
mmDP1_DP_SEC_CNTL 10544 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP1_DP_SEC_CNTL                                                                              0x1a41
mmDP1_DP_SEC_CNTL 3202 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDP1_DP_SEC_CNTL 0x1FA0
mmDP1_DP_SEC_CNTL 4005 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDP1_DP_SEC_CNTL                                                       0x1fa0
mmDP1_DP_SEC_CNTL 8717 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP1_DP_SEC_CNTL                                                                              0x222b
mmDP1_DP_SEC_CNTL 11328 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP1_DP_SEC_CNTL                                                                              0x222b
mmDP1_DP_SEC_CNTL 10234 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP1_DP_SEC_CNTL                                                                              0x222b