mmDP1_DP_DPHY_SCRAM_CNTL_BASE_IDX 10525 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP1_DP_DPHY_SCRAM_CNTL_BASE_IDX                                                              2
mmDP1_DP_DPHY_SCRAM_CNTL_BASE_IDX 8702 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP1_DP_DPHY_SCRAM_CNTL_BASE_IDX                                                              2
mmDP1_DP_DPHY_SCRAM_CNTL_BASE_IDX 11313 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP1_DP_DPHY_SCRAM_CNTL_BASE_IDX                                                              2
mmDP1_DP_DPHY_SCRAM_CNTL_BASE_IDX 10219 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP1_DP_DPHY_SCRAM_CNTL_BASE_IDX                                                              2