mmDP1_DP_DPHY_SCRAM_CNTL 4557 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDP1_DP_DPHY_SCRAM_CNTL                                                0x4bb6
mmDP1_DP_DPHY_SCRAM_CNTL 4549 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDP1_DP_DPHY_SCRAM_CNTL                                                0x4bb6
mmDP1_DP_DPHY_SCRAM_CNTL 5781 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDP1_DP_DPHY_SCRAM_CNTL                                                0x4bb6
mmDP1_DP_DPHY_SCRAM_CNTL 10524 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP1_DP_DPHY_SCRAM_CNTL                                                                       0x1a34
mmDP1_DP_DPHY_SCRAM_CNTL 3925 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDP1_DP_DPHY_SCRAM_CNTL                                                0x1fd5
mmDP1_DP_DPHY_SCRAM_CNTL 8701 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP1_DP_DPHY_SCRAM_CNTL                                                                       0x221e
mmDP1_DP_DPHY_SCRAM_CNTL 11312 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP1_DP_DPHY_SCRAM_CNTL                                                                       0x221e
mmDP1_DP_DPHY_SCRAM_CNTL 10218 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP1_DP_DPHY_SCRAM_CNTL                                                                       0x221e