mmDP1_DP_DPHY_CNTL_BASE_IDX 10511 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP1_DP_DPHY_CNTL_BASE_IDX                                                                    2
mmDP1_DP_DPHY_CNTL_BASE_IDX 8688 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP1_DP_DPHY_CNTL_BASE_IDX                                                                    2
mmDP1_DP_DPHY_CNTL_BASE_IDX 11299 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP1_DP_DPHY_CNTL_BASE_IDX                                                                    2
mmDP1_DP_DPHY_CNTL_BASE_IDX 10205 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP1_DP_DPHY_CNTL_BASE_IDX                                                                    2