mmDP0_DP_SEC_PACKET_CNTL 4724 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDP0_DP_SEC_PACKET_CNTL                                                0x4ace
mmDP0_DP_SEC_PACKET_CNTL 4777 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDP0_DP_SEC_PACKET_CNTL                                                0x4ace
mmDP0_DP_SEC_PACKET_CNTL 6009 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDP0_DP_SEC_PACKET_CNTL                                                0x4ace
mmDP0_DP_SEC_PACKET_CNTL 10282 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP0_DP_SEC_PACKET_CNTL                                                                       0x194c
mmDP0_DP_SEC_PACKET_CNTL 3156 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDP0_DP_SEC_PACKET_CNTL 0x1CAA
mmDP0_DP_SEC_PACKET_CNTL 4092 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDP0_DP_SEC_PACKET_CNTL                                                0x1caa
mmDP0_DP_SEC_PACKET_CNTL 8429 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP0_DP_SEC_PACKET_CNTL                                                                       0x2136
mmDP0_DP_SEC_PACKET_CNTL 11022 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP0_DP_SEC_PACKET_CNTL                                                                       0x2136
mmDP0_DP_SEC_PACKET_CNTL 9928 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP0_DP_SEC_PACKET_CNTL                                                                       0x2136