mmDP0_DP_SEC_CNTL7_BASE_IDX 8482 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP0_DP_SEC_CNTL7_BASE_IDX                                                                    2
mmDP0_DP_SEC_CNTL7_BASE_IDX 11075 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP0_DP_SEC_CNTL7_BASE_IDX                                                                    2
mmDP0_DP_SEC_CNTL7_BASE_IDX 9981 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP0_DP_SEC_CNTL7_BASE_IDX                                                                    2