mmDP0_DP_SEC_CNTL 4636 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDP0_DP_SEC_CNTL                                                       0x4ac3
mmDP0_DP_SEC_CNTL 4667 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDP0_DP_SEC_CNTL                                                       0x4ac3
mmDP0_DP_SEC_CNTL 5899 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDP0_DP_SEC_CNTL                                                       0x4ac3
mmDP0_DP_SEC_CNTL 10260 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP0_DP_SEC_CNTL                                                                              0x1941
mmDP0_DP_SEC_CNTL 3150 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDP0_DP_SEC_CNTL 0x1CA0
mmDP0_DP_SEC_CNTL 4004 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDP0_DP_SEC_CNTL                                                       0x1ca0
mmDP0_DP_SEC_CNTL 8407 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP0_DP_SEC_CNTL                                                                              0x212b
mmDP0_DP_SEC_CNTL 11000 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP0_DP_SEC_CNTL                                                                              0x212b
mmDP0_DP_SEC_CNTL 9906 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP0_DP_SEC_CNTL                                                                              0x212b