mmDP0_DP_MSE_SAT_UPDATE_BASE_IDX 10295 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP0_DP_MSE_SAT_UPDATE_BASE_IDX                                                               2
mmDP0_DP_MSE_SAT_UPDATE_BASE_IDX 8442 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP0_DP_MSE_SAT_UPDATE_BASE_IDX                                                               2
mmDP0_DP_MSE_SAT_UPDATE_BASE_IDX 11035 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP0_DP_MSE_SAT_UPDATE_BASE_IDX                                                               2
mmDP0_DP_MSE_SAT_UPDATE_BASE_IDX 9941 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP0_DP_MSE_SAT_UPDATE_BASE_IDX                                                               2