mmDP0_DP_LINK_CNTL_BASE_IDX 10199 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP0_DP_LINK_CNTL_BASE_IDX                                                                    2
mmDP0_DP_LINK_CNTL_BASE_IDX 8350 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP0_DP_LINK_CNTL_BASE_IDX                                                                    2
mmDP0_DP_LINK_CNTL_BASE_IDX 10943 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP0_DP_LINK_CNTL_BASE_IDX                                                                    2
mmDP0_DP_LINK_CNTL_BASE_IDX 9849 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP0_DP_LINK_CNTL_BASE_IDX                                                                    2