mmDP0_DP_DPHY_SCRAM_CNTL 4556 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDP0_DP_DPHY_SCRAM_CNTL                                                0x4ab6
mmDP0_DP_DPHY_SCRAM_CNTL 4548 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDP0_DP_DPHY_SCRAM_CNTL                                                0x4ab6
mmDP0_DP_DPHY_SCRAM_CNTL 5780 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDP0_DP_DPHY_SCRAM_CNTL                                                0x4ab6
mmDP0_DP_DPHY_SCRAM_CNTL 10240 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDP0_DP_DPHY_SCRAM_CNTL                                                                       0x1934
mmDP0_DP_DPHY_SCRAM_CNTL 3924 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDP0_DP_DPHY_SCRAM_CNTL                                                0x1cd5
mmDP0_DP_DPHY_SCRAM_CNTL 8391 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDP0_DP_DPHY_SCRAM_CNTL                                                                       0x211e
mmDP0_DP_DPHY_SCRAM_CNTL 10984 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDP0_DP_DPHY_SCRAM_CNTL                                                                       0x211e
mmDP0_DP_DPHY_SCRAM_CNTL 9890 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDP0_DP_DPHY_SCRAM_CNTL                                                                       0x211e