mmDMIF_PG5_DPG_PIPE_URGENCY_CONTROL 6407 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDMIF_PG5_DPG_PIPE_URGENCY_CONTROL                                     0x4533
mmDMIF_PG5_DPG_PIPE_URGENCY_CONTROL 6529 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDMIF_PG5_DPG_PIPE_URGENCY_CONTROL                                     0x4533
mmDMIF_PG5_DPG_PIPE_URGENCY_CONTROL 7827 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDMIF_PG5_DPG_PIPE_URGENCY_CONTROL                                     0x4533
mmDMIF_PG5_DPG_PIPE_URGENCY_CONTROL 7846 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDMIF_PG5_DPG_PIPE_URGENCY_CONTROL                                                            0x107d
mmDMIF_PG5_DPG_PIPE_URGENCY_CONTROL 3096 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDMIF_PG5_DPG_PIPE_URGENCY_CONTROL 0x4A33
mmDMIF_PG5_DPG_PIPE_URGENCY_CONTROL 5193 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDMIF_PG5_DPG_PIPE_URGENCY_CONTROL                                     0x4a33