mmDMCU_UC_INTERNAL_INT_STATUS_BASE_IDX 1263 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDMCU_UC_INTERNAL_INT_STATUS_BASE_IDX                                                         2
mmDMCU_UC_INTERNAL_INT_STATUS_BASE_IDX  977 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDMCU_UC_INTERNAL_INT_STATUS_BASE_IDX                                                         2
mmDMCU_UC_INTERNAL_INT_STATUS_BASE_IDX  645 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDMCU_UC_INTERNAL_INT_STATUS_BASE_IDX                                                         2
mmDMCU_UC_INTERNAL_INT_STATUS_BASE_IDX  607 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDMCU_UC_INTERNAL_INT_STATUS_BASE_IDX                                                         2