mmDMCU_UC_CLK_GATING_CNTL 4351 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDMCU_UC_CLK_GATING_CNTL                                               0x161b
mmDMCU_UC_CLK_GATING_CNTL 4306 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDMCU_UC_CLK_GATING_CNTL                                               0x161b
mmDMCU_UC_CLK_GATING_CNTL 5538 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDMCU_UC_CLK_GATING_CNTL                                               0x161b
mmDMCU_UC_CLK_GATING_CNTL 1280 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDMCU_UC_CLK_GATING_CNTL                                                                      0x03d1
mmDMCU_UC_CLK_GATING_CNTL 3038 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDMCU_UC_CLK_GATING_CNTL 0x161B
mmDMCU_UC_CLK_GATING_CNTL 3726 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDMCU_UC_CLK_GATING_CNTL                                               0x161b
mmDMCU_UC_CLK_GATING_CNTL 1000 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDMCU_UC_CLK_GATING_CNTL                                                                      0x00f8
mmDMCU_UC_CLK_GATING_CNTL  668 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDMCU_UC_CLK_GATING_CNTL                                                                      0x00f8
mmDMCU_UC_CLK_GATING_CNTL  630 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDMCU_UC_CLK_GATING_CNTL                                                                      0x00f8